Simulation using XILINX-Procedure

HDL Codes to realize Logic Gates

Design and Implementation of 3x8 Decoder

Design & Implement 8X3 ENCODER program using Verilog HDL

 Design & Implement PRIORITY ENCODER program using Verilog HDL

Design & Implement 8X1 MULTIPLEXER program using Verilog HDL

Design and implement the 8x1 MULTIPLEXER with 2x1 MULTIPLEXERs program using Verilog HDL

Ddesign and implement the Demultiplexer using verilog HDL

Design & Implement 4-BIT COMPARATOR program using Verilog HDL

Design & Implement FULL-ADDER

Design & Implement  D-FLIPFLOP  program using Verilog HDL.

Design & Implement JK-FLIP FLOP program using Verilog HDL

Design & Implement T-FLIPFLOP program using Verilog HDL

Design & Implement 4-BIT COUNTER  program using Verilog HDL

Design and implement BCD Counter using verilog HDL

Design and Implement MOORE MACHINE program using Verilog HDL

Designof 4-bit BINARY TO GRAY converter