Design & Implement T-FLIPFLOP program using Verilog HDL

AIM:-To Design & Implement T-FLIPFLOP program using Verilog HDL.
Objectives: The main objective of this program is students will learn the difference between Sequential and Combinational circuits and how to use Clock Signal.
TOOL:-Xilinx ISE 9.2i Version

FAMILY	SPARTAN 3
Device	XC3S400
Package	PQ208
Speed	-4/-5
Synthesis	XST(VERILOG/VHDL)
Simulator	ISE Simulator

Architecture:

Truth Table:

q	T	Q(t+1)
0	0	0
0	1	1
1	0	1
1	1	0

SOURCE CODE:-

module tff(q,qbar,clk,rst,t);
 input clk;	 
input rst;
input t;
output q,qbar; 
reg q,qbar;
wire qq=t^q;
always @ (posedge clk,negedge rst)
begin              
if(rst==1'b0)
begin
q=1'b0;
qbar=1'b1;
end	    
else 
begin	 		  
q=qq;	  
qbar=~q;		  
end 
end
endmodule

TEST BENCH:-

module tfftb_v;
reg clk,rst,t;
wire q,qbar;	
tff uut (.q(q), .qbar(qbar), .clk(clk), .rst(rst), .t(t));
initial begin	
rst = 1'b0;	
clk = 1'b0;	
t = 1'b0;
end
always #10 clk=~clk;
always #20 t=~t;
always #200 rst=~rst;
endmodule

SIMULATED WAVEFORMS:-

RTL SCHEMATIC:-

SYNTHESIS REPORT:-

TIMING REPORT:-

DEVICE UTILIZATION SUMMARY:-

SYNTHESIS DIAGRAM:-

CONCLUSION:-
The T-flipflop was designed using Verilog HDL & implemented in FPGA Spartan 3 kit.
Outcomes: Students will observe the difference between sequential and combintional circuits in terms of delay.
Viva Questions

1. Why PMOS and NMOS are sized equally in a Transmission Gates?

2. What happens when the PMOS and NMOS are interchanged with one another in an inverter?

3. Why are pMOS transistor networks generally used to produce high signals, while nMOS?

4. What’s the difference between Testing & Verification?

5. Realize the D-flip flop with NOR gates.

6. Realize the D-flip flop with AOI gates.

7. What do you mean by scaling?

8. What is the pull up and pull down ratio.

9. Is transistor can be used as resistor? Justify?

10. Difference between Synchronous and Asynchronous reset.

11. What is DRC ?

12. What is LVS ?

13. What is SIMULATION ?

14. What is SYNTHESIS?

15. What is latch?

16. What is the Difference between Latch & Flip-flop?

17. What is the mobility of hole?

18. Why VTP = VTN ?

19. List various logic families.

20. Which is the fastest in the logic family.

21. Why PMOS transistor is large compared with NMOS transistor

Updated
Nov 28, 2021
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