Designof 4-bit BINARY TO GRAY converter

AIM: To develop the source code for binary to gray converter by using VERILOG and obtained the simulation, synthesis, place and route and implement into FPGA.
Objectives: Learn conversions from one form to other and develop the code for the same

SOFTWARE & HARDWARE:
1. XILINX 9.2i
2. FPGA-SPARTAN-3

CODE CONVERTER (BCD TO GRAY):

TRUTH TABLE:

BCD GRAY

0000 0000

0001 0001

0010 0011

0011 0010

0100 0110

0101 0111

0110 0101

0111 0100

1000 1100

1001 1101

Logic Diagram:

Verilog Code:

module b2g_behv(b, g);
input [3:0] b;
output [3:0] g;
reg [3:0] g;
always@(b) begin
g[3]=b[3];
g[2]=b[3]^b[2];
g[1]=b[2]^b[1];
g[0]=b[1]^b[0];
end
endmodule

RESULT: Thus the OUTPUT%u201Fs of binary to gray converter are verified by synthesizing and simulating

the VERILOG code.

Viva Questions:

1. What is the pull up and pull down ratio of Nmos Inverter driven by Nmos inverter?
2. Is transistor can be used as resistor? Justify?
3. Why PMOS transistor is large compared with NMOS transistor?
4. Difference between Synchronous and Asynchronous reset.
5. What is threshold voltage of Mos transistor?
6. What are disadvantagesof CMOS technology?

Outcomes:

The main outcome of this program is to use RAM in the form of LUT’s.