R09 - December, 2011 - Regular Examinations - Set - 3.

B.Tech II Year - I Semester Examinations, December2011

DIGITAL LOGIC DESIGN

(COMPUTER SCIENCE AND ENGINEERING)

Time: 3 hours Max. Marks: 75

Answer any five questions

All questions carry equal marks

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1. Convert the following binary numbers to equivalentdecimal number.

a) 0.111 b)111.1011 [15]

2. Convert the following to product of sums form.

a)abc’ ab’c a’bc

b)abc (bc)’(a cd) (b c) [15]

3. Using the maps method, simplify the following expression using sumof the product from.

a)(abc)’ a(bc)’ don’t cares abc a’bc’ a’b’c

b)Abc (ab)’c don’t cares abc’ ab’c [15]

4. Design a combinational circuit for a multiplexer.[15]

5. Explain the analysis of clocked sequentialcircuits. [15]

6. Design a Ripple counter considering one example.[15]

7. Design a PLA for the following equation.

F=a’bc b’c ab [15]

8. An Asynchronous sequential circuit is described by the followingexcitation and output function.

Y=x1x2’ (x1 x2’)yand Z=Y

a) Draw thelogic diagram of the circuit.

b) Derivethe transition table and output map.

c) Obtain a2-state flow table

d) Describein words the behaviour of the circuits. [15]

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