R09 - December, 2011 - Regular Examinations - Set - 2.

B.Tech II Year - I Semester Examinations, December2011

DIGITAL LOGIC DESIGN

(COMPUTER SCIENCE AND ENGINEERING)

Time: 3 hours Max. Marks: 75

Answer any five questions

All questions carry equal marks

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1. Perform the following Subtraction in Binary numbersystem using 2’ s compliment

a) 1111 –110 b) 1011.11 – 101.001 [15]

2. Prove the following rules using the proof byperfection Induction

a)X Y’ XY =X b) X X’Y=X Y [15]

3. Derive the Boolean algebra expression for a getting network thatwill have outputs 0 only when X=1, Y=0, Z=0. The outputs are to be 1 for allother cases. [15]

4. Design a combinational circuit of a magnitude comparator consideringone example.

[15]

5. Explain sequential circuit design considering one example. [15]

6. Design a left shift and right shift for the following data

10110101[15]

7. Design a Random Access memory having 8 K Bytes. Indentify how manyaddress lines are needed and also word length. [15]

8.a) Explain the difference between Asynchronous and Synchronoussequential circuits.

b) Define fundamental mode operation.

c) Explain the difference between stable and unstablestates.

d) What is the difference between an internal stateand total state? [15]

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