R07 - June, 2010 - Supplementary Examinations - Set - 1.

Code.No: 07A3EC16                                      R07                                                    SET-1

 

JAWAHARLALNEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

IIB.TECH I SEM- SUPPLEMENTARY EXAMINATIONS, JUNE - 2010

DIGITALLOGIC DESIGN

(COMMONTO CSE, IT, CSS)

Time:3hours                                                                                                                Max.Marks:80

Answerany FIVE questions

Allquestions carry equal marks

- - -

1.         Convert the following numbers.

a)        10101100111.0101 to Base 10

b)        (153.513)10 = ( )8

c)        Find (3250 – 72532)10 using 10’scomplement

d)        Divide 01100100 by 00011001

e)         Given that (292)10 = (1204)b determine‘b’. [3 4 3 3 3]

2.         a)         Design a circuit with four inputs andone output where the output is 1 if the input is                                                                                                                  divisibleby 3 or 7.

b)         Asafe has 5 locks: v, w, x, y and z, all of which must be unlocked for the safeto open. The keys to the locks are distributed among five executives in thefollowing manner:

Mr.Ahas keys for locks v & x

Mr.Bhas keys for locks v & y

Mr.Chas keys for locks w & y

Mr.Dhas keys for locks x & z

Mr.Ehas keys for locks v & z.

i)         Determine the minimal number ofexecutives required to open the safe.

ii)         Findall the combinations of executives that can open the safe. Write an expressionf(A,B,C,D,E) which specifies when the safe can be opened as a function of whichexecutives are required.

iii)       Who is the ‘essential executive’without whom the safe cannot be opened? [7 9]

3.         Eachof the following functions actually represents a set of 4 functions,corresponding to the various assignments of the don’t care terms

F1(w,x, y, z) = S(1, 3, 4, 5, 9, 10, 11) SF(6, 8) where F = don’t cares.

F2(w,x, y, z) = S(0, 2, 4, 7, 8, 15) SF(9, 12) where F = don’t cares.

a)        Find f3 = f1 ? f2. How manyfunctions does f3 represent?

b)        Find f4 = f1 f2. How manyfunctions does f4 represent?

c)        Simplify f3 and f4. [4 4 8]

4.         a)         Design a circuit with threeinputs(A,B,C) and two outputs(X,Y) where the outputs are the binary count ofthe number of “ON” (HIGH) inputs.

b)        Design a 2-bit comparator usinggates. [8 8]

5.         a)         CompareCombinational versus Sequential logic circuits.

b)        Define the following terms of aflip – flop:

i)         Hold time

ii)        Setup time

iii)       Propagation delay time. [8 8]

6.         Explain about BCD Ripple Counters. [16]

7.         Explain about:

a)        ROM

b)        FPGA. [8 8]

8.         Explain about the following:

a)        Three row flow table

b)        Closed covering condition. [16]

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    Aug 05, 2012
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