Switching Theory and Logic Design Mid - II, November - 2014

1.Different logic functions that can be realized by a single threshold gate by changing the following
  • inputs and weights
  • weights and threshold
  • inputs and threshold
  • none
Answer: B
2.Identify the user programmable ROMS among the following
  • PROM
  • EPROM
  • EEPROM
  • all the above
Answer: D
3.Synchronous counters are faster than ripple counters because
  • All flip flops are clocked in parallel
  • propagation delay is additive
  • they use faster flip flops
  • all the above
Answer: A
4.In T Flip Flop, T=0 and Q(t)=1 then Q(t+1)=
  • 0
  • 1
  • unpredictable
  • none
Answer: B
5.Minimum number of flip flops needed to construct a BCD Decade counter is
  • 4
  • 3
  • 10
  • none
Answer: A
6.Serial binary adder is a
  • Combinational circuit
  • sequential circuit
  • adder circuit
  • all the above
Answer: B
7.FSM in which output depends on present state is
  • Mealy machine
  • Moore machine
  • multiplier machine
  • all the above
Answer: B
8.Preset and clear inputs are often called
  • Direct set, Direct reset
  • Direct reset, Direct set
  • both Direct set
  • both Direct reset
Answer: A
9.A sequential circuit can be represented by
  • State diagrams
  • Stable table
  • ASM Chart
  • all the above
Answer: D
10.In an ASM Chart, mealy machine output are mentioned with in the
  • State box
  • Decision box
  • conditional box
  • none
Answer: C
11.The flip flop is the fundamental building block of ___________________logic circuits.
Answer: Sequential circuit
12.The Boolean function that is realizable using a single threshold gate is called as ______
Answer: Threshold function
13.The PAL has _________________ AND array and ____________________ OR array.
Answer: Programmable, fixed
14.The amount of time input signal must be present before the clock edge strike is called ______________.
Answer: Set up time
15._____________________ is used for hardware design and resembles that of conventional flowchart.
Answer: ASM
16.State minimization procedure eliminates ___________________ states.
Answer: Redundant
17.Merger graph identifies _______________________
Answer: Compatible states
18.An ASM Chart is made up of several interconnected ___________________.
Answer: ASM Block
19.To avoid racing in JK Flip Flop _________________ is used.
Answer: JK Master Slave Flip Flop/ Edge triggering
20.The circle in a state diagram corresponds to _________________in an ASM Chart.
Answer: State box