Pulse and Digital Circuits Mid - II, April - 2012

1.Bootstrap’s sweep circuit produces _____ type of waveform.
  • positive going Ramp
  • negative going Ramp
  • either a or b
  • Both a and b
Answer: A
2.The gate signal is also called as ___________.
  • enabling pulse
  • control pulse
  • both a and b
  • either a or b
Answer: C
3.Sampling gates are used in _______.
  • Multiplexers
  • D to A converters
  • Sample and Hold circuits
  • All the above
Answer: D
4.The variations in phase delay occur due to ____.
  • variations in loop gain
  • variations in supply voltage
  • both a and b
  • None
Answer: C
5.Among the logic families, low power dissipation is in _____.
  • DTL
  • CMOS
  • TTL
  • ECL
Answer: B
6.Synchronization is said to be with frequency division, if the generators operate at___
  • same frequency
  • different frequency
  • both a and b
  • None
Answer: B
7.Synchronization with symmetrical signals is possible if_______.
  • Tp <= T0
  • Tp >= T0
  • both a and b
  • either a or b
Answer: C
8.Which of the following logic family has highest fan-out.
  • ECL
  • TTL
  • DTL
  • CMOS
Answer: D
9.Among the logic families, Slowest logic family is_____.
  • TTL
  • DTL
  • CMOS
  • ECL
Answer: C
10.In Miller circuit, the gain A of the inverting amplifier should be ____.
  • unity
  • zero
  • infinite
  • None of the above
Answer: C
11.The ratio of the difference between the input and the output to the input at the end of the sweep time is called _____________________.
Answer: Transmission error
12.The output of the time base generator is called _____________.
Answer: Sweep Voltage
13.The gain of a sampling gate is defined as ____________.
Answer: The ratio of the output voltage to the input voltage during transmission
14.___________ is a transmission circuit in which the output is an exact replica of input waveform during a selected time interval and is zero otherwise.
Answer: Ideal sampling gate
15.The periodic variations in the phase delay are called _________.
Answer: Phase jitter
16.The range of synchronization increases with increasing _____.
Answer: sync signal amplitude
17.The relation between slope error and transmission error is ____________
Answer: es=2et
18.Typical noise margin for DTL family is _______.
Answer: 700mV
19.CML is also called as ___________.
Answer: ECL
20.In a 4-diode sampling gate, minimum value of Vc is given by ____________.
Answer: Vcmin=Vs[2+Rc / RL]