Microprocessors and Interfacing Mid - I, September - 2014
1.8085 microprocessor contain ………….……. number of 16 bit registers.
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2
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3
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4
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5
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Answer: D
2.After execution of CMP instruction, if Source is greater than destination then CF = …… & ZF = ……
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1, 0
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1, 1
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0, 0
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0, 1
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Answer: A
3.What does microprocessor speed depends on?
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clock
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Data Bus width
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Address Bus width
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a & b
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Answer: B
4.In 8255, under the I/O mode of operation, we have …… modes
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3
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2
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4
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1
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Answer: B
5.In a DMA write operation the data is transferred
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From I/O to memory
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from memory to I/O
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from memory to memory
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from I/O to I/O
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Answer: A
6.Ready pin of a microprocessor is used
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to indicate that the microprocessor is ready to receive inputs
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to indicate that the microprocessor is ready to receive outputs
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to introduce wait states
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to provide direct memory access
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Answer: C
7.Which port of 8255 used for control signals in IO mode2 configuration
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mode 0
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mode 1
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mode 2
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b & c
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Answer: D
8.In 8086, the status of & A0 while transferring 16 bit data.
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0, 0
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0, 1
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1, 0
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1, 1
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Answer: A
9.Which instruction performs 2’s complement
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CMPL
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NEG
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CLR
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XTAL
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Answer: B
10.In 8086 the following has the highest priority among all the interrupts
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NMI
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DIV O
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TYPE 255
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OVER FLOW
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Answer: A
11.Number of Interrupt Sources in 8085 is ……………..
Answer: 5
12.………… 8086 microprocessor pins are used to request and acknowledge a DMA transfer?
Answer: HOLD & HLDA
13.Maximum ………………. amount of memory can be interface to 8086 microprocessor.
Answer: 1MB
14.Settling time of DAC 0800 around …………..
Answer: 100ms
15.………….. Interrupt of 8086 is level triggered signal.
Answer: INTR
16.……………. instruction converts hexadecimal number into decimal.
Answer: DAA
17.Base address is …………………….
Answer: Starting address of the segment
18.MOV AX, 10H [BX+SI] is in ……………….. Addressing mode.
Answer: Relative base indexed addressing mode
19.………………… are used to separate valid address and data in minimum mode configuration of 8086.
Answer: Latches& transceivers
20.Hints to assembler are called ………………
Answer: Assembler directives