Digital Logic Design Mid - I, September - 2011
1.The minimum number of bits required to code 2n distinct quantities is
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n
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2n
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n^2
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none
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Answer: A
2.A literal is a ________________ variable.
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complemented
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uncomplemented
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both
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A or B
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Answer: D
3.A Binary Cell has _________________ stable states
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4
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2
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3
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1
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Answer: B
4.The operator precedence for evaluating Boolean expressions is
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parentheses, NOT, OR, AND
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parentheses, AND , OR, NOT
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parentheses, NOT, AND, OR
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parentheses, OR, AND, NOT
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Answer: C
5.A literal is a primed variable.
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TRUE
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FALSE
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both
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none
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Answer: A
6.The operator symbol סּ indicates
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equality
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coincidence
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Ex-clusive NOR
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All
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Answer: D
7.Half - Adder circuit needs _____ binary inputs and ____binary outputs.
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1, 1
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1, 2
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2, 2
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2, 1
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Answer: C
8.NAND gate is also called as
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Inverter
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Bubbled – OR
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Bubbled – AND
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All
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Answer: B
9.(0.93)10 = ( ___________ ) 8
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0.55
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0.7341
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0.17
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0.258
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Answer: B
10.In Binary Addition, 1 1 = ______________
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10
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1
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0
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All
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Answer: A
11.Karnaugh Map is also known as ___________________________________.
Answer: Veitch diagram
12.Universal Logic Gates are _______________ and ___________________.
Answer: NAND, NOR
13.De-Morgan’s Laws are ______________________ and __________________.
Answer: -- AB = -A + -B and ---A + B = -A . -B
14.EBCDIC stands ________________________________________.
Answer: Extended Binary Coded Decimal Interchange Code
15.In ____________________, only one output line will be there irrespective any number of input lines.
Answer: Multiplexer
16.The BCD equivalent of 70 is _________________________.
Answer: 01110000
17.VHDL stands ______________________________________.
Answer: Very High Speed Integrated Circuit Hardware Description Language
18.BCD is ____________________ code.
Answer: Weighted
19.Dual of A.1 = A is ______________________.
Answer: A + 0 = A
20.In Ex-NOR truth table, output for input combination of 1 and 0 is ________.
Answer: 0